1. Field of the Invention
The present invention relates to a semiconductor device, and particularly to a semiconductor device of the type that is formed by etching a target material to be etched through the so-called sidewall transfer process.
2. Description of the Related Art
In formation of a wiring pattern (line-and-space) in a semiconductor manufacturing process, a photolithography mask is used to develop a resist to transfer the pattern to the resist. Then, the resist is used as a mask for etching a target material to be etched in general.
The request for fine patterning of semiconductor devices requires formation of a wiring pattern below the resolution limit of lithography and as a method for realizing this formation, the so-called resist slimming process is known. This method comprises developing a resist; and then applying an isotropic etching to the resist or to a sacrifice film and the like etched with a mask of the resist, thereby forming a line pattern, below the resolution limit of lithography, for example, having a width smaller than the resolution limit width W (a minimum length determined by a resolution limit).
As another method, the so-called sidewall transfer process is known (see, for example, JP-A 7-263677 (hereinafter referred to as Patent Document 1); and JP-A 2006-156657 (hereinafter referred to as Patent Document 2)). This method comprises forming a hard mask and then a resist on a wiring material; thereafter applying a resist slimming process to the resist, and then etching the hard mask using the resist as a mask. After the resist is stripped, a thin film, which is turned into a sidewall film, is deposited, then an anisotropic etching or the like is used to etch the thin film on the bottom and top to form the sidewall film on the sidewall of the hard mask (the above slimming process may be applied to the hard mask itself after processing the hard mask, instead of slimming the resist). Then, an anisotropic etching or an isotropic etching is applied to selectively remove only the hard mask and leave the sidewall film. The sidewall film is used as a mask to process the wiring material. This method makes it possible to form a line-and-space having a smaller width than the dimension of the hard mask that is restricted by the resolution limit width W.
In the sidewall transfer process, the sidewall film is formed in a closed-loop shape surrounding the hard mask and a wiring layer is formed along the film. Therefore, the wiring layer should be used after being cut by etching or the like in any part of the closed-loop (hereinafter, such the cut is referred to as “closed-loop cut”).
The wiring layer formed through the sidewall transfer process is turned into a wiring pattern having a width of around ½ of the resolution limit W, which makes it difficult to form a contact region for connection to other wiring. Patent Document 2 discloses that a folded section of the sidewall film formed in a prolate ellipsoidal closed-loop is cut and the folded section is used as a contact region. In the configuration of Patent Document 2, however, the folded section used as the contact region locates in the proximity of an adjacent wiring layer and reduces the margin of deviation in position of the contact as a problem.
In addition, the wiring layers are formed at a narrow pitch below the resolution limit W, which results in a small tolerance (margin) of alignment deviation in closed-loop cut as a problem.